• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    The present invention relates to a semiconductor power controller having semi-analog overcurrent protection. According to the invention, the control unit (5) of the controller (1) comprises a counter (6) which is adapted to increment or decrement a count (C) when the measured current (IM) is greater than a threshold value. (ITH) and to decrement or increment the count (C) when the measured current (IM) is less than the threshold value (ITH), where the power switch (2) is adapted to interrupt the line (3) when the counter (6) reaches or exceeds a preset count limit value (trip limit). The invention finds application in particular in the field of aeronautics.
    公开号:FR3046503A1
    申请号:FR1750042
    申请日:2017-01-03
    公开日:2017-07-07
    发明作者:Maglie Rodolphe De；Erich Riedisser；Nejat Mahdavi
    申请人:Liebherr Elektronik GmbH；
    IPC主号:
    专利说明:

    SEMICONDUCTOR POWER CONTROLLER HAVING SEMI-ANALOGUE PROTECTION AGAINST OVERCURRENT
    The present invention relates to a solid state power controller and a solid state power controller arrangement, the main tasks of which are to protect electrical devices and their electrical overload wiring as a function of time and to couple electrical devices to a power supply system or decouple them from this system.
    [0002] A solid state power controller or SSPC typically uses a digital microcontroller (digital signal processor or DSP) to implement the required functionality using a software program. In this respect, the main object of this semiconductor power controller is to switch electrical power to a load and to interrupt current flow in a time-dependent manner in the case of overload or overvoltage.
    [0003] The prior art solid state power controllers are in this case programmed using their microcontrollers, so that they have a characteristic of l2t. This means that the product of the square of the current I and the time t to reach a critical energy level is constant, so that the time or time when a disconnection occurs is inversely proportional to the square of the current. In other words, the device is adapted to disconnect quickly at high currents, but to perform subsequent disconnection at low currents. The advantage of this is that no disconnection is produced on a moderate overcurrent if the current is reduced or leaves the overcurrent range after a short time or period. This reduces the occurrence of disruptive disconnections, so that incorrect trigger actions of disconnections are minimized. In addition, the semiconductor power controllers known in the prior art have a functionality that includes a memory function so that a previous overload that has not made a disconnect cooperates, after a transient departure from the overload range, with a second overload current which occurs briefly after this, so that a disconnection of a line takes place faster than only with respect to the presence of the second overload current (memory effect). This brings the advantage that the thermal heating of the device to be protected by the semiconductor power controller can be mapped.
    In summary, the semiconductor power controller has, therefore, the two main tasks of connecting or interrupting loads in an electrical circuit and to ensure the protection of the cables connected to the load. The loads can be in particular control actuators or electrical control in an aircraft, with a thermal circuit breaker still very common in this environment. The protection in this respect includes an observation of a short circuit and an overload with respect to a curve l2t of the cable.
    It is necessary in an aircraft to design the power management unit of the actuator (APMU) so that a protection of the cables connected to the APMU is provided. This protection must simultaneously also replace the behavior of a fuse which preferably has the typical behavior l2t and mechanical power interruption circuits previously used. The advantages over flexibility and higher stability are sought here and the possibility of lowering costs is also sought.
    As already established above, conventional solid-state power controllers (SSPCs) use digital control units such as a microcontroller or a DSP (Digital Signal Processor) to implement the functions. required in the form of a software program. However, this architecture results in an increased error frequency and an increase compared to the certification effort for the implanted software since it can be subjected to a particularly precise test or certification in an aircraft.
    [0007] US patent application 2008/0174928 A discloses a semiconductor power controller which implements a function l2t using a capacitor and a counter, with the first capacitor being charged several times when an overcurrent event or surge occurs. The counter, in this case, performs a count in relation to the number of charge cycles of the first capacitor to detect a cutoff condition. In addition, the circuit includes a discharge module which is connected to the breaking module and which includes a resistor and a second capacitor, wherein an electrical parameter which is related to the count drops in time using the resistor and the second capacitor.
    The above described model of the prior art has the disadvantage that the capacitors used in it are of central importance and that the overall accuracy and long-term stability depend on these components. In addition, a thermal behavior is not taken into account accurately or reliably on the fall of the count.
    The count is, moreover, only updated when an overload case is measured. The total energy balance that is also considered to states in the case of non-overload is not used.
    It is therefore an object of the present invention to provide a solid state power controller (SSPC) which overcomes the aforementioned drawbacks and which simultaneously performs a function l2t without the presence of a microcontroller or the like.
    For this purpose, the present invention provides a semi-analog semiconductor power controller which comprises a power switch for interrupting a line, a current detector for measuring current flow on the line, and a power unit. control for controlling the power switch which is adapted to prevent overcurrent on the line based on the current measured by the current sensor, and which is characterized in that the control unit comprises a counter which is adapted to increment or decrementing a count when the measured current is greater than a threshold value and decrementing or incrementing the count when the measured current is less than the threshold value, with the power switch being adapted to interrupt the line when the counter reaches or exceeds a preset count limit value.
    It is clear to those skilled in the art that the calculation operation (incrementation or decrementation) in the case of a current which is greater than the threshold value must be different from the case in which the current is less than the threshold value. An incrementation and decrementation pair of this fact always takes place.
    The counting of the counter is preferably not changed for the case in which the measured current lM is exactly equal to the threshold value lTH.
    Unlike the controllers of semiconductor power known in the prior art, the value of the count depends directly on the current measured in the case of an overcurrent event. This results in more reliable and accurate conclusions of the actual state of the line to be controlled since the charge of the capacitors or the like can not produce undesired differences.
    The power switch of the semiconductor power controller of the invention has the ability to disconnect or connect the line to be controlled. In a separate state, the flow of current through the line is suppressed, while in a connected state of the line, current flow through the line is possible. The current detector measures the intensity of the current flowing on the line and transmits the measured current to the control or control unit. This is adapted to control the power switch, that is to say, the disconnection or the closing of the line. This is done on the basis of the current measured by the current detector in that a counter increments a count when the measured current is greater than a threshold value or decrements the count when the measured current is less than the threshold value. By reaching or exceeding a preset count limit value, the power switch interrupts the line so that current can no longer flow through the line.
    The control unit preferably comprises a comparator which is connected to the threshold value and the measured current and which produces a signal at an input of the counter which determines the counting direction (incrementation or decrementation) of the count. An upward counting direction is an increment, while a downward counting direction is a decrement. The comparator, in this respect, is a reliable alternative for implementing the required function of the control unit. It is possible by the connection with the threshold value and with the measured current, to produce a signal at the output of the comparator which adopts a defined state depending on whether the measured current is greater than the threshold value. The state is typically a high value or a low value of a range of voltages. This signal is then transmitted to a counter input whose wiring decides to increment or decrement the count. The output of the comparator for the case lM = Ith plays no role, that is to say that it can adopt a high value or a low value.
    According to another variant embodiment of the invention, the frequency of the counter at which it increments or decrements its count is related to a difference in the current measured from the threshold value, with the preference relation being expressed. by the expression (threshold value - measured current) 2 to implement the typically required characteristic l2t of the semiconductor power controller.
    The greater the difference in the current measured from the threshold value, the faster is an incrementation or a decrementation of the counter. If, for example, the measured current is considerably above the threshold value, an incrementation of the counter takes place rapidly one after the other so that the count reaches or exceeds the predefined count limit value relatively quickly. If, on the other hand, the measured current is just below the threshold value, this produces a decrementation of the counter, with the time intervals between the individual decrement steps being large.
    According to another embodiment of the invention, the control unit further comprises a differentiator which is connected to the measured current and the threshold value and which produces a difference value between the threshold value and the threshold value. measured current; a multiplier that multiplies the difference value produced by the differentiator itself (squared); a voltage-to-frequency converter which converts the value produced by the multiplier into a sequence of pulses of a corresponding frequency, with the pulse sequence being transmitted to a clock input (CLK input) of the counter so that a incrementation or decrementation of the counter takes place at each pulse.
    The differentiator forms the difference between the measured current and the threshold value which is multiplied by itself in the multiplier. The sign of the difference is meaningless since the multiplier squares the difference value of the measured current and the threshold value. The output of the multiplier is connected to the voltage - frequency converter.
    The voltage-frequency converter is a component that produces a sequence of pulses depending on its input voltage, the intervals of said sequence of pulses being inversely proportional to the input voltage value. At a high input voltage value of the voltage - frequency converter, a pulse sequence having a high frequency is thereby produced while at a low input voltage value of the voltage - frequency converter a sequence of low frequency pulses is produced. The pulse sequence produced by the voltage-to-frequency converter is applied to a clock input of the counter so that the counter increments or decrementes each of the pulses produced by the multiplier.
    Overall, this means that with a greater difference in the measured current from the threshold value, the counting of the counter changes very quickly, whereas with a small difference of the measured current and the threshold value, the counter count only changes more slowly over time with the l2t feature being implemented by squaring using the multiplier.
    According to yet another embodiment of the present invention, the control unit further comprises a current-voltage converter for converting the current measured by the current detector into a voltage value. In this respect, this current-voltage conversion is preferably accomplished prior to applying a signal to a comparator and a differentiator so that the voltage value is applied to the differentiator and the comparator corresponding to the measured current.
    According to another aspect of the invention, the power switch for disconnecting or interrupting a line is adapted to close the line on a fall below the predefined count limit value or on a status below the limit. preset count limit value. A current can flow through the line controlled by the semiconductor power controller so long as the counting limit value of the counter has not been exceeded.
    Preferably, the counter has a smaller count which can not be further decremented, with the smallest count preferably zero.
    According to another embodiment of the invention, the control unit is adapted to map or map a characteristic l2t, with this taking place preferably without using a microcontroller. This brings advantages since it is not necessary to subject the software of a microcontroller or a digital signal processor (DSP) to a certification test in critical applications; for example when using the semiconductor power controller in an aircraft.
    It is additionally possible that the semiconductor power controller does not have a microcontroller and / or substantially only comprises the components of the above paragraphs describing the solid state power controller.
    According to a variant of the invention, the power switch is bi-directionally conductive and preferably comprises a bi-polar IGBT gate transistor, a MOSFET insulated gate field effect transistor, a Si semiconductor, and / or an SiC semiconductor.
    The invention also relates to an arrangement of semiconductor power controllers which comprises at least two semiconductor power controllers with a first semiconductor power controller which is present in a line which serves the purpose. conduction of a current to a load and with a second semiconductor power controller which is present in a line which serves to conduction of the current out of the load. This two-channel architecture allows the detection of a ground fault or other faults that are based on a differential current imbalance without increased effort. A semiconductor power controller is thereby inserted into the positive line and a solid state power controller is inserted into the negative line of a load to be controlled and / or connected to the power controller at semiconductors.
    The invention will be better understood, and other objects, features, details and advantages thereof will appear more clearly in the explanatory description which follows with reference to the accompanying drawings given solely by way of example illustrating several Embodiments of the invention and in which: - Figure 1 shows the semiconductor power controller of the invention in an assembly with a power distribution device; FIG. 2 is a block diagram showing the basic principle of the semiconductor power controller according to the invention; FIG. 3 is a block diagram of the semi-analog control unit of the semiconductor power controller according to the invention; and FIG. 4 represents a diagram relating to the different signal states of the control unit of the semiconductor power controller of the invention.
    FIG. 1 represents the use of a semiconductor power controller 1 for the protection of lines which are arranged between the load 12, typically an actuator, and the power or energy distribution device. An AC voltage is input to the AC / DC converter 13 and is produced in DC voltage converted therefrom. A load 12 is connected to the voltage drop between the two lines. In this respect, a semiconductor power converter 1 is provided both in the line 31 which conducts the current to the load 12 and in the line 32 which conducts the current out of the load 12.
    This is referred to as a semiconductor power controller assembly in a two-channel architecture since a solid-state power controller is present in both channels (lines) of the load.
    The semiconductor power controller 1 has, in this case, the behavior of a fuse with its typical characteristic l2t and typically serves to replace the mechanical power switches previously used. In addition to its main power-on and off function, the solid-state power controller prevents ignition or burning of the cable between the solid-state power controller and the load during a short circuit or during a short circuit. overload phases.
    The arrangement shown in FIG. 1 with two semiconductor power controllers in the respective lines which connect the load to the voltage source, enables the recognition in a simple manner of defects on the basis of a current imbalance. differential.
    FIG. 2 represents a diagram which shows in detail the functional blocks of the semiconductor power controller shown in FIG. 1, since a semiconductor power controller is present in FIG. 1 at a time at the line of FIG. positive voltage and negative voltage line, the operation of the solid state power controller will be explained in the following with reference to only one of the solid state power controllers that are essentially the same. The presence of a solid state power controller in only one line is sufficient for the essential characteristics of the solid state power controller.
    The line 3 to be switched and / or controlled by a solid-state power controller is sampled using a current detector 4 for the current flowing in line 3. The current detector 4 measures this is the current flowing in line 3. This current is transmitted to a control control unit 5 which decides using a control mechanism discussed in detail below, if a power switch 2 disconnects or connects line 3. The power switch 2 has a driver 16 for accomplishing the disconnection or the connection of the line 3. The power supply unit 15 (PSU), in this respect, supplies power to both the power supply unit and the power supply unit. control 5 and the driver 16 of the power switch 2. In addition, the control unit 5 is coupled to a signal logic 18 via an isolator 14, the signal logic being able to communicate with an instance higher order control . The signal logic 18 may, for example, receive a reset signal from this instance to reset all settings or a enable signal to implement the operation of the semiconductor controller. Conversely, the signal logic 18 of this higher-order control instance may communicate different states such as the current measured on line 3 or the disconnection of line 3 by the semiconductor power controller 1 because of a excessive current on line 3.
    Also to be prepared for the case of a fault or a malfunction of the semiconductor power controller, a conventional fuse 17 is additionally provided in line 3. This fuse 17 is, however, optional and may be a safety fuse, or other conventional fuse.
    Galvanic isolation is provided using an insulator 14 through which the control unit 5 communicates with the signal logic 18. In the case of a short circuit, it ensures that the signal logic can not be altered in this way.
    FIG. 3 represents a block diagram of the control unit 5. It is recognized that the current of the line 3 measured by the current detector 4 is converted by the current-voltage converter 11 into a voltage value which corresponds to the current measured in line 3 and is represented by the symbol "lM". A threshold value "lTH" may additionally be recognized which is transmitted together with the measured current to a comparator 7 and a differentiator 8.
    In this regard, the comparator 7 is connected so that it performs a simple comparison of the two input values lM and lTH and produces a specific signal value (high value or low value) depending on which of the two signals entrance is the largest. It is determined in cooperation with the counter module 6, which has an input 61 fixing the counting direction, that the counter 6 increasingly counts on a measured current lM greater than the threshold value ITh and the counter 6 counts decreasingly. on a measured current 1M which is less than the threshold value lTH. If the measured current lM is thus greater than the threshold value lTH, the counter 6 increments its count; otherwise, counter 6 decrements its count. For the case where the measured current corresponds exactly to the threshold value lTH, the counter 6 can either increment or decrement its count. This is meaningless since in this case the count is not changed.
    In summary, the counter 6 performs its counting direction depending on whether the measured current lM is greater or less than the threshold value lTH.
    The measured current 1M and the threshold value 1H, moreover, also enter a differentiator 8. This differentiator 8 determines the difference of the two signals applied to it. A voltage level is thereby applied to the output of the differentiator which can be expressed in a mathematical sense where ΔΙ = threshold lTH - current measured lM. The sign of this difference is not significant for the following observation since the result ΔΙ obtained by the differentiator 8 is squared using a multiplier 9 so that the result ΔΙ obtained by the differentiator 8 can now be summarized in (ΔΙ) 2.
    The squared difference (ΔΙ) 2 of the measured current lM from the measured value lTH is then applied to the voltage-frequency converter 10. This component produces a sequence of pulses, with the output pulse interval depending on the value. the input voltage level. A high voltage level at the input of the voltage-to-frequency converter 10, for example, produces a sequence of pulses whose intervals are small, i.e., which have a high frequency. A low voltage level, on the other hand, produces a sequence of pulses whose intervals of each other are large, i.e., which have a low frequency. This is represented mathematically in that the period of the pulses is a function dependent on ΔΙ2 '. The output of the voltage-frequency converter 10 is connected to the input 62 of the counter 6. The input 62 is represented by "CLK> > and denotes an input of the counter at which a count is either incremented or decremented in the presence of a pulse, depending on the wiring of the input 61 which is indeed directly connected to the output of the comparator 7.
    It is therefore possible to say that the greater the difference between the measured current lM and the threshold value lTH is greater, the more an incrementation / decrementation which takes place by the counter 6 is faster or higher is the corresponding frequency to which it takes place.
    If the counter 6 reaches a specific predefined count, the so-called count limit value "limited trigger", the counter 6 produces a signal to disconnect the connection 3 by the power switch 2. This signal is called a signal d stop or trip.
    FIG. 4 shows signal diagrams that simplify the routines in the control unit 5. Here, the signal curves are taken at certain selected positions in the control unit 5 and entered in time. Three sections are essentially shown here with reference to which the operation of the semiconductor power controller according to the invention will be explained.
    The highest of the four diagrams shown shows the measured current lM and the threshold value lTH. As already explained in connection with FIG. 3, these two signals are deduced from each other by means of the differentiator and the square of the difference quantity of these two signals ΔΙ2 takes place by means of the multiplier 9. .
    This is reproduced visually in the representation below and substantially corresponds to a signal curve as it is present at the output of the multiplier 9 or at the input of the voltage-frequency converter 10.
    Below this, in turn, is a curve of a signal as present at the output of comparator 7. It can be recognized here that the signal has a high value for regions in which the signal measured lM is greater than the threshold value lTH, and is a low value in the opposite case. In this case, the input 61 of the counter 6 is adapted such that it produces an incrementation on a high value signal and a decrementation of the count in the counter 6 on a low value signal.
    The lowest representation in FIG. 4, in this case, represents the variation of the count C with reference to the time spread of the curve of the measured current I M represented in FIG. 4 as well as the count limit value " tripping limit 'whose reaching or exceeding produces a tripping command at power switch 2 to disconnect line 3.
    Starting from the marked time zone as section I which is represented by means of vertical lines through all the diagrams, the count has a specific value. Since the measured current 1M is greater than the threshold value 1TH, an up counting direction of the counter 6 takes place, it is thereby incremented. The frequency of the incrementation steps is substantially determined in this case from the difference of the measured current 1M of the threshold value 1TH. since the counter increments or decrements this count depending on ΔΙ2. As long as the measured current 1M is greater than the threshold value 1TH, the count increases continuously but increases most rapidly in those regions in which the difference of the measured current 1M of the threshold value 1TH is the largest.
    If the measured current lM falls below the threshold value lTH, no direct reset of the counter value to zero at a different initialization value takes place, but rather a decrementation of the count value reached C is accomplished depending on the difference of the measured current 1M and the threshold value ITh This can be recognized in section II of the diagrams shown in FIG. 4.
    A certain memory effect results in this way by the function chosen for measured currents lM exceeding the threshold ITh lately.
    An excess of the measured current lM above the threshold value lTH can again be recognized in section III with reference to the signal curves shown in FIG. 4. This produces a similar behavior of the counting as in section I. Since the excess of the measured current lM lasts a long time and produces in total a surplus of the count limit value, "trip limit" in connection with the excess of the threshold value lTH observed in section I, a signal of trigger is transmitted by the counter 6 to the power switch 2 on an excess or a breach of the count limit value "trip limit" which initiates a disconnection of the line 3.
    Since the counting is not just reset to a starting value, the desired characteristic l2t is precisely mapped or mapped with its memory function.
    The advantages of the semiconductor power controller described above can be seen in a particularly high reliability and in the low costs that are involved in the implementation of the solution. Unlike a digital solution in which a microcontroller programmed with software takes control of the operation, technological risks and a development effort are significantly reduced in this respect. The increased software certification effort for the case of an application of the semiconductor power controller in an aircraft may also not be underestimated in that it does not occur with the solution of the invention or occurs only to a greatly reduced effect.
    权利要求:
    Claims (11)
    [1" id="c-fr-0001]
    A solid state power controller (1) comprising: a power switch (2) for interrupting a line (3); a current detector (4) for measuring a flow of current on the line (3); and a control unit (5) for controlling the power switch (2) which is adapted to prevent overcurrent on the line (3) preferably time dependent, based on the current (1M) measured by the current detector (4), characterized in that the control unit (5) comprises a counter (6) which is adapted (a) to increase or (b) decrement a count (C) when the measured measured current (lM) is greater than at a threshold value (lTH) and for (a) decrementing or (b) incrementing the count (C) when the measured current (lM) is lower than the threshold value (lTH), where the power switch (2) is adapted to interrupt the line (3) when the counter (6) reaches or exceeds a predetermined count limit value (trip limit).
    [2" id="c-fr-0002]
    2. A semiconductor power controller (1) according to claim 1, characterized in that the control unit (5) comprises a comparator (7) which is connected to the threshold value (lTH) and the measured current. (lM) and produces a signal at an input (61) of the counter (6) which determines the counter direction of the counter (6).
    [3" id="c-fr-0003]
    3. Solid state power controller (1) according to claim 1 or 2, characterized in that the frequency of the counter (6), to which the latter increments or decrements its count (C) is related to a difference the measured current (lM) of the threshold value (ITh) with this preference relation expressed by the expression (threshold value (lTH) - measured current (lM)) 2.
    [4" id="c-fr-0004]
    The semiconductor power controller (1) according to one of the preceding claims, characterized in that the control unit (5) further comprises: a differentiator (8) which is connected to the measured current (1M) and the threshold value (ITh) which produces a difference value between the threshold value (lTH) and the measured current (lM); a multiplier (9) which multiplies the difference value produced by the differentiator itself; and a voltage-frequency converter (10) which converts the value produced by the multiplier (9) into a pulse sequence of a corresponding frequency; wherein the pulse sequence is transmitted to a clock input (62) of the counter (6) such that incrementation or decrementation of the count (C) takes place at each pulse.
    [5" id="c-fr-0005]
    Solid state power controller (1) according to one of the preceding claims, characterized in that the control unit (5) further comprises a current-voltage converter (11) for converting the current (1M). measured by the current detector (4) at a voltage value.
    [6" id="c-fr-0006]
    6. Solid state power controller (1) according to one of the preceding claims, characterized in that the power switch (2) for interrupting a line (3) is adapted to close the line (3) on a fall below the preset count limit value (trip limit) or a status below this preset count limit value.
    [7" id="c-fr-0007]
    Solid state power controller (1) according to one of the preceding claims, characterized in that the counter (6) has the smallest count (C) which can not be further decremented and in that said The smallest count (C) is preferably zero.
    [8" id="c-fr-0008]
    8. Solid state power controller (1) according to one of the preceding claims, characterized in that the control unit (5) is adapted to map a characteristic l2t, preferably taking place without the use a microcontroller.
    [9" id="c-fr-0009]
    The solid state power controller (1) according to one of the preceding claims, which does not include a microcontroller and / or which comprises substantially only the components of the preceding claims.
    [10" id="c-fr-0010]
    10. A semiconductor power controller (1) according to one of the preceding claims, characterized in that the power switch (2) is bi-directionally conductive and preferably comprises a bi-polar gate transistor (IGBT). , an insulated gate field effect transistor (MOSFET), an Si semiconductor and / or an SiC semiconductor.
    [11" id="c-fr-0011]
    11. Arrangement (100) with solid state power controllers, characterized in that it comprises two semiconductor power controllers (1) according to one of the preceding claims, wherein a first semiconductor power controller conductor (1) is present in a line (31) for conducting a current to a load and wherein a second semiconductor power controller (2) is present in a line (32) for conduction of the current out of the load (12).
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    法律状态:
    2018-01-22| PLFP| Fee payment|Year of fee payment: 2 |
    2019-01-29| PLFP| Fee payment|Year of fee payment: 3 |
    2019-11-15| PLSC| Publication of the preliminary search report|Effective date: 20191115 |
    2020-01-28| PLFP| Fee payment|Year of fee payment: 4 |
    2021-01-26| PLFP| Fee payment|Year of fee payment: 5 |
    2022-01-24| PLFP| Fee payment|Year of fee payment: 6 |
    优先权:
    申请号 | 申请日 | 专利标题
    DE102016000034.1A|DE102016000034A1|2016-01-04|2016-01-04|Solid state current control with semi-analogue overcurrent protection|
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